System for frequency modulation

ABSTRACT

A system for frequency modulation which generates first and second signals having different frequencies in a switching manner in accordance with the logical value of an input signal. The system includes an oscillator for generating a signal having a predetermined frequency; first and second frequency-dividers for subjecting the signal generated by the oscillator to frequency division by different integers l and m to generate first and second signals which are synchronized with each other; a third frequency-divider for subjecting an output signal from said second frequency-divider to frequency division by an integer n selected so that the product m×n is the least common multiple of l and m; a control device for controlling input data with an output signal from said third frequency-divider; and a switching device for selecting one of the output signals from the first and second frequency-dividers in accordance with the logical value of an output signal from the control device to generate an output which is passed through a filter for providing a modulated output.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a frequency modulation system whichassigns different frequencies f₀ and f₁ to logical values 0 and 1 andgenerates signals having those two frequencies in a switching manner inaccordance with the logical value of an input.

2. Description of the Prior Art

FIG. 1 is a block diagram showing a system for frequency modulationaccording to the prior art. An oscillator 101 generating an output F₀ ofa frequency f₀ corresponding to the logical value 0 has its outputterminal connected to an input terminal 104 of a switching device 103,whereas an oscillator 102 generating an output F₁ of a frequency f₁corresponding to the logical value 1 has its output terminal connectedto an input terminal 105 of the switching device 103. Input data Din tothe modulation system is applied directly to a switching input terminal106 of the switching device 103. Output data D_(out) from an outputterminal 107 of the switching device 103 is applied to a filter 108limiting its frequency band, the output of which becomes a modulatedoutput M_(out).

The output signal F₀ from the oscillator 101 and the output signal F₁from the oscillator 102 are not synchronized with each other. Becausethe input data D_(in) to the modulation system is applied to theswitching input terminal 106 of the switching device 103, the output ofthe switching device 103 is switched between signal F₁ and signal F₀independently of the respective phases of signals F₀ and F₁ inaccordance with changes in the input signal D_(in) to the modulationsystem.

FIG. 2 illustrates the waveforms at different parts of the modulationsystem shown in FIG. 1. In FIG. 2, reference numerals 201 and 202respectively show output signals F₀ and F₁ of the oscillators 101 and102, numeral 203 the input signal D_(in), numeral 204 the output signalD_(out) from the switching device 103, and numeral 205 the output signalM_(out) from the filter 108. The signal waveforms of the different partswhen an input data D_(in) having the waveform illustrated by 203 in FIG.2 is applied to the switching input terminal 106 of the switching device103 are illustrated by 201, 202, 204, and 205. The input signal D_(in)203 changes from logical value 0 to logical value 1 at a time T₁. Theoutput signal from the switching device 103 is switched by that inputdata D_(in). More specifically, before time T₁ signal F₀, the waveformof which is illustrated by 201, is generated as the output signal 107from the switching device 103, and after time T₁ signal F₁, the waveformof which is illustrated by 202, is generated. In other words, since thesignals F₀ and F₁ and the input data D_(in) to the input terminal 106 ofthe switching device 103 are not synchronized with each other, theoutput signal D_(out) from the output terminal 107 of the switchingdevice 103 has a waveform whose phase changes abruptly at time T₁, asshown by 204. The modulated signal M_(out), which is obtained byfiltering the output signal 204 through the filter 108, has a waveformwhose amplitude and phase are very distorted in the vicinity of time T₁,as shown by 205 in FIG. 2. Because of the incompleteness of thismodulation system, the time during which there is an indefinite outputduring the interchange between the logical values 1 and 0 is extended inthe prior art within a predetermined band width at the demodulator, sothat the bit rate obtainable is lower than the theoretical valuedetermined by the band width. In other words, in order to obtain apredetermined bit rate and bit error rate, it is necessary in the priorart to enlarge the band width of the transmission line sufficiently morethan the theoretical value.

SUMMARY OF THE INVENTION

It is, therefore, an object of the present invention to provide amodulation system for generating a modulated signal whose phase does notchange abruptly when the frequency is switched.

In order to achieve the above object, the present invention ischaracterized in that the signal F₁ with the frequency f₁ correspondingto the logical value 1 and the signal F₀ with the frequency f₀corresponding to the logical value 0 are synchronized with each other,and in that the frequency of the output is switched only at an instantwhen the phase of the signals F₁ and F₀ are coincident.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing the construction of a modulationsystem according to the prior art;

FIG. 2 is a timing chart illustrating the example of the operations ofthe modulation system of FIG. 1;

FIG. 3 is a block diagram showing one embodiment of the modulationsystem according to the present invention;

FIG. 4 is a timing chart illustrating one example of the operations ofthe modulation system of FIG. 3; and

FIGS. 5 to 7 are block diagrams each showing other embodiments of themodulation system according to the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention will be described in more detail in the followingin connection with the embodiments thereof with reference to theaccompanying drawings.

FIG. 3 shows one embodiment of the modulation system according to thepresent invention. As shown in FIG. 3, the output F_(osc) of an outputterminal 302 of an oscillator 301 with an oscillatory frequency f_(osc)is applied to input terminals of a 1/l frequency divider 303 and a 1/mfrequency divider 306. An output signal F₀ with a frequency f₀ =f_(osc)×1/l from an output terminal 305 of the 1/l frequency divider, and anoutput signal F₁ with a frequency f₁ =f_(osc) ×1/m from an outputterminal 307 of the 1/m frequency divider are each applied to the inputterminals of a switching device 308. The frequency of the output signalF₁ is further divided by n by the action of a 1/n frequency divider 313.The value of n is the smallest integer such that the product m×n is amultiple of the integer l. A timing signal F_(T) at an output terminal314 of the 1/n frequency divider 313, which has a frequency f_(T) =f₁×1/n=f_(osc) ×1/mn which is obtained by dividing the frequency of theoutput signal F₁ by n in the 1/n frequency divider 313, is input to asampling device 315 and a reset input terminal 304 of the 1/l frequencydivider 303. Input data D_(in), which has been sampled by the samplingdevice 315 in response to the timing signal F_(T), is input to aswitching input terminal of the switching device 308. A signal D_(out)from a terminal 310 of the switching device 308 is applied through afilter 311 to an output terminal 312 to generate a modulated outputM_(out).

FIG. 4 illustrates the signal waveforms of the different parts of themodulation system of FIG. 3 when l=6,m=4 and n=3. In FIG. 4, referencenumeral 401 illustrates the output signal F_(osc) from the oscillator301, numerals 402 and 403 the output signals F₀ and F₁ of the 1/lfrequency divider 303 and the 1/n frequency divider 313, respectively,numeral 404 the output signal F_(T) from the 1/n frequency divider 313,numeral 405 the input data D_(in), numeral 406 an output signal D_(s)from the sampling device 315, numeral 407 the output signal D_(out) fromthe switching device 308; and numeral 408 the output signal M_(out) fromthe filter 311. Both output signals F₀ and F₁ of the 1/l frequencydivider 303 and the 1/m frequency divider 306, which are illustrated by402 and 403 respectively in FIG. 4, are prepared by dividing thefrequency of the output signal F_(osc) of the same oscillator 301illustrated by, 401 in FIG. 4, so that they are synchronized with eachother. Since the ratio of the frequency f₀ of signal F₀ to the frequencyf₁ of signal F₁ is set at 2:3, the signals F₀ and F₁ are in phase witheach other every two cycles of the signal F₀ and every three cycles ofthe signal F₁. In short, the two signals F₀ and F₁ fall simultaneouslywith each other. Specifically, the timing signal F_(T), which isobtained by dividing the frequency of the signal F₁ by n, i.e., three,falls once every three cycles of the signal F₁. The 1/l frequencydivider 303 is reset by the timing signal F_(T) thus obtained. In otherwords, when the timing signal F_(T) falls, the output of the 1/lfrequency divider 303 is also made to fall. As a result, when the timingsignal F_(T) falls, both signals F₀ and F₁ fall, which makes theirphases coincident with each other. Similar results can be obtained byresetting the 1/n frequency divider 306 by detecting when both theoutputs of the 1/l frequency divider 303 and the 1/m frequency divider306 falls.

The operations will be described in the following by taking as anexample the case in which the data D_(in) having a waveform illustratedby 405 in FIG. 4 is input to the modulation system. The input dataD_(in) is sampled by the sampling device 315, when the timing signalF_(T) illustrated by 404 in FIG. 4 falls, so that a sampled value isgenerated at the output terminal of the sampling device 315. The signalthus generated at the output terminal of the sampling device 315 holdsits value until the next time the timing signal F_(T) falls. As aresult, the signal D_(s), which is obtained by sampling the input dataD_(in) with the timing signal F_(T), has a waveform the value of whichcan change, as illustrated by 406 in FIG. 4, only when the timing signalF_(T) falls. In the example under discussion, the value of the signalD_(s) changes from 0 to 1 at time T₁ so that the signal generated at theoutput terminal 310 of the switching device 308 is switched from thesignal F₀ to the signal F₁ at the time T₁ in accordance with the changein the signal D_(s). At time T₁, the phases of both signals F₀ and F₁are at 0 (i.e., at the fall) so that the output signal D_(out) obtainedfrom the switching device 308 has a waveform such that its phase has nodiscontinuity even at the frequency change, as illustrated by 407 inFIG. 4. Thus, the modulated signal M_(out), which is obtained byfiltering the output signal D_(out) from the switching device 308through the filter 310, becomes a signal that always has a predeterminedamplitude, has no abrupt change in phase, and has little distortion, asillustrated by 408 in FIG. 4. As a result, at the demodulator, thetransient period of time during the interchange between the logicalvalues 1 and 0 is so reduced that a higher bit rate than that of theprior art can be obtained within a predetermined band width .

Since there are no unnecessary spectral components, and, thus, the powerratio occupied by the signal component in the signal wave is increased ,the S/N ratio can be increased on the reception side.

FIG. 5 is a block diagram showing another embodiment of the modulationsystem according to the present invention. In this embodiment, the inputdata D_(in) is sampled by the output signal of the 1/l frequency divider303, and the 1/m frequency divider 306 and the 1/n frequency divider 313are reset. This time, incidentally, l is the least common multiple ofthe integers m and n.

FIG. 6 is a block diagram showing a third embodiment of the modulationsystem according to the present invention. The 1/l frequency divider 303is reset by the output signal of the 1/n frequency divider 313, and thetiming signal F_(T) is generated so that input data D_(in) synchronizedwith that timing signal F_(T) by a synchronizer 316 is input to theswitching device 308. In this case, the multiple m×n is the least commonmultiple of both the integers m and l.

FIG. 7 is a block diagram showing a fourth embodiment of the modulationsystem according to the present invention. the 1/m frequency divider 306and the 1/n frequency divider 313 are reset by the output of the 1/lfrequency divider 303, and the timing signal F_(T) is generated so thatinput data D_(in) synchronized with the timing signal F_(T) by asynchronizer 316 is input to the switching device 308. In thisembodiment, l is the least common multiple of the integers m and n.

As has been described hereinbefore, according to the present inventionit is possible to generate a FSK (i.e., Frequency Shift Keying) signal,the phase of which changes continuously even at the interchanges of thefrequencies, and which has few unnecessary spectral components, therebyproviding signals with a narrower band and higher quality than those ofthe prior art.

What is claimed is:
 1. A system for frequency modulation, comprising:oscillating means for generating a signal having a predeterminedfrequency; first and second frequency-dividing means for subjecting thesignal generated by said oscillating means to frequency division bydifferent integers l and m and to generate first and second signals,respectively, which are synchronized with each other; thirdfrequency-dividing means for subjecting an output signal from saidsecond frequency-dividing means to frequency division by an integer nselected so that the product m×n is the least common multiple of l andm; control means for controlling input data in accordance with an outputsignal from said third frequency-dividing means; and switching means forselecting one of the output signals from said first and secondfrequency-dividing means in accordance with a logical value of an outputsignal from said control means to generate a frequency modulated output.2. A system for frequency modulation according to claim 1, wherein saidcontrol means includes a sampling device for sampling the input data inaccordance with the output signal from said third frequency-dividingmeans.
 3. A system for frequency modulation according to claim 1,wherein said control means includes a synchronizer device forsynchronizing the input data in accordance with the output signal fromsaid third frequency-dividing means.
 4. A system for frequencymodulation according to claim 1, further comprising filter means forfiltering the output of said switching means to provide a frequencymodulated filtered frequency modulated output.
 5. A system for frequencymodulation, comprising: oscillating means for generating a signal havinga predetermined frequency; first and second frequency-dividing means forsubjecting the signal generated by said oscillatory means to frequencydivision by different integers m and n and to generate first and secondsignals, respectively; third frequency-dividing means for subjecting anoutput signal from said oscillatory means to frequency division by aninteger l which is the least common multiple of integers m and n;control means for controlling input data in accordance with an outputsignal from said third frequency-dividing means; and switching means forselecting one of the output signals from said first and secondfrequency-dividing means in accordance with a logical value of an outputsignal from said control means to generate a frequency modulated output.6. A system for frequency modulation according to claim 5, wherein saidcontrol means includes a sampling device for sampling the input data inaccordance with the output signal from said third frequency-dividingmeans.
 7. A system for frequency modulation according to claim 5,wherein said control means includes a synchronizer device forsynchronizing the input data in accordance with the output signal fromsaid third frequency-dividing means.
 8. A system for frequencymodulation according to claim 5, further comprising filter means forfiltering the output frequency modulated of said switching means toprovide a filtered frequency modulated output.